This invention relates to integrated circuits and, more particularly, to configurable storage blocks in an integrated circuits.
Considering a programmable logic device (PLD) as one example of an integrated circuit, as applications for which PLDs are used increase in complexity, it has become more common to design PLDs to include specialized blocks such as configurable storage blocks in addition to blocks of generic programmable logic.
Configurable storage blocks are often arranged in arrays of memory elements. In a typical array, data lines are used to write data into and read data from the configurable storage blocks. Address lines may be used to select which of the memory elements are being accessed. A configurable storage block is typically configurable to implement a memory of a given depth and width, whereby the maximum depth is based on the number of address lanes and the maximum width on the number of data lanes.
A situation may arise where a user wants to implement a given memory with a width that exceeds the maximum width of a single configurable storage block. In this situation, multiple configurable storage blocks may be used together to implement the given memory. In such a configuration, each configurable storage block stores a portion of the given memory at a given address in the respective configurable storage block.